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portada Design of Low-Voltage CMOS Switched-Opamp Switched-Capacitor Systems
Type
Physical Book
Author
Publisher
Year
2010
Language
English
Pages
192
Format
Paperback
ISBN
1441953582
ISBN13
9781441953582
Categories

Design of Low-Voltage CMOS Switched-Opamp Switched-Capacitor Systems

Vincent S. L. Cheung (Author) · Howard Cam H. Luong (Author) · Springer · Paperback

Design of Low-Voltage CMOS Switched-Opamp Switched-Capacitor Systems - Cheung, Vincent S. L. ; Luong, Howard Cam H.

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Synopsis "Design of Low-Voltage CMOS Switched-Opamp Switched-Capacitor Systems"

In Design of Low-Voltage CMOS Switched-Opamp Switched-Capacitor Systems, the emphasis is put on the design and development of advanced switched-opamp architectures and techniques for low-voltage low-power switched-capacitor (SC) systems. Specifically, the book presents a novel multi-phase switched-opamp technique together with new system architectures that are critical in improving significantly the performance of switched-capacitor systems at low supply voltages: *A generic fast-settling double-sampling SC biquadratic filter architecture is proposed to achieve high-speed operation for SC circuits. *A low-voltage double-sampling (DS) finite-gain-compensation (FGC) technique is employed to realize high-resolution SD modulator using only low-DC-gain opamps to maximize the speed and to reduce power dissipation. *A family of novel power-efficient SC filters and SD modulators are built based on using only half-delay SC integrators. *Single-opamp-based SCsystems are designed for ultra-low-power applications. In addition, on the circuit level, a fast-switching methodology is proposed for the design of the switchable opamps to achieve switching frequency up to 50 MHz at 1V, which is improved by about ten times compared to the prior arts. Finally, detailed design considerations, architecture choices, and circuit implementation of five chip prototypes are presented to illustrate potential applications of the proposed multi-phase switched-opamp technique to tackle with and to achieve different stringent design corners such as high-speed, high-integration-level and ultra-low-power consumption at supply voltages of 1V or lower in standard CMOS processes.

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