Name: Design and performance analysis of low power and high speed dual modulus prescalers
Price: 93.93 EUR
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Author: Nirmal, Uma ; Jain, V. K.
ISBN: 9786139447305

portada Design and performance analysis of low power and high speed dual modulus prescalers

Design and performance analysis of low power and high speed dual modulus prescalers

Type

Physical Book

Author

V. K. Jain

Uma Nirmal

Publisher

LAP Lambert Academic Publishing

Language

English

Pages

160

Format

Paperback

Dimensions

22.9 x 15.2 x 0.9 cm

Weight

0.24 kg.

ISBN13

9786139447305

Synopsis "Design and performance analysis of low power and high speed dual modulus prescalers"

The broadband wireless communications extensively use high-performance synthesizers. To achieve flexible frequency synthesis, the two essential components namely Voltage Controlled Oscillator (VCO) followed by the frequency divider must be power efficient and operate at high frequency. The frequency divider is a basic block in a Phase Lock Loop (PLL) synthesizer for the conversion from high to low frequencies. Prescaler is one of the most vital parts of frequency-divider as it works at high speed and consumes maximum power. The objective of this research work is to design divide by 'N' prescaler and divide by N/N+1 dual modulus prescalers for various low power applications. In this thesis, we have carried a detailed analysis on the speed and power consumption of the digital dividers. We performed design and implementation of low power divide by 'N' prescalers. Architecture of the divide by 'N' prescalers using hybrid master slave flip flop has been explained. Based on this architecture divide by 2, 3, 4, 5, 6, 7, 8, 9, 10, and 11 prescaler circuits have been successfully designed at 5 GHz operating frequency.

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Design and performance analysis of low power and high speed dual modulus prescalers - Nirmal, Uma ; Jain, V. K.

Synopsis "Design and performance analysis of low power and high speed dual modulus prescalers"

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